| 摘要 |
A logic circuit combining an exclusive OR gate and an exclusive NOR gate is provided. The logic circuit includes an NMOS transistor, a PMOS transistor, and first and second inverters. The NMOS transistor has a source connected to a first input signal, a drain connected to a first output signal, and a gate connected to a second input signal. The PMOS transistor has a source connected to the first input signal, a drain connected to a second output signal, and a gate connected to the second input signal. The first inverter receives the first output signal and outputs the second output signal. The second inverter receives the second output signal and outputs the first output signal.
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