发明名称 |
Efficient execution and emulation of bit scan operations |
摘要 |
Methods are disclosed to implement bit scan operations using properties of two's complement arithmetic and compute zero index instructions. A data value may be provided and the most-significant or least-significant bit may be determined using the methods set forth herein.
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申请公布号 |
US7430574(B2) |
申请公布日期 |
2008.09.30 |
申请号 |
US20040877931 |
申请日期 |
2004.06.24 |
申请人 |
INTEL CORPORATION |
发明人 |
BRETERNITZ, JR. MAURICIO;WU YOUFENG;ABIR TAL |
分类号 |
G06F7/00;G06F7/74 |
主分类号 |
G06F7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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