发明名称 Method of forming silicide gate with interlayer
摘要 A field-effect transistor ("FET") or similar device has a fully silicided ("FUSI") gate electrode. The gate electrode has a gate interface silicide portion between the gate dielectric and a bulk gate silicide portion. The gate interface silicide is formed by depositing a gate electrode interface layer having silicide retardation species underneath the metal/silicon layers used to form the gate silicide. The gate electrode interface layer retards silicide formation at the gate dielectric/gate electrode interface when the bulk gate silicide is formed, and the gate interface silicide is then formed at a higher temperature or longer heat cycle time.
申请公布号 US7429526(B1) 申请公布日期 2008.09.30
申请号 US20060484193 申请日期 2006.07.11
申请人 XILINX, INC. 发明人 NAYAK DEEPAK KUMAR;LUO YUHAO
分类号 H01L21/3205 主分类号 H01L21/3205
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