Data converter and image reader using the same

摘要

A data converter is provided with arranged in a parallel manner such that each has a storage capacity for plurality of bits. A counter counts clock pulses and supplies a signal representing the counting results to a decoder, which in turn supplies loading pulses to respective shift registers. The shift registers received in a parallel manner a plurality of serial bit data in response to the loading pulses and internally transfer the storage contents bit by bit in response to transfer signals, so that the data read from the shift registers are outputted through an output control gate.