发明名称 Structure, material, and design for assembling a low-K Si die to achieve an industrial grade reliability wire bonding package
摘要 Provided are semiconductor low-K Si die wire bonding packages with package stress control and fabrication methods for such packages. The packages include molding interface material applied onto the low-K Si die. In general, the molding interface material is selectively applied onto the low-K Si die surface in order to minimize to safe levels the package stress experienced by the low-K Si die. Selective application includes defining various combinatorial patterns of coated and non-coated regions. In addition, selective application may also include a general application of molding interface material to create a stress buffer zone. The results are packages with less stress experienced by the low-K Si die and so improved reliability (in compliance with industry specifications).
申请公布号 US7427813(B1) 申请公布日期 2008.09.23
申请号 US20030719218 申请日期 2003.11.20
申请人 ALTERA CORPORATION 发明人 WANG WEN-CHOU VINCENT;LI YUAN
分类号 H01L29/40;H01L23/28;H01L23/29 主分类号 H01L29/40
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