| 摘要 |
PROBLEM TO BE SOLVED: To increase output speed while solving problems of power consumption, noise and undesired radiation in a solid state imaging device which adopts an address read-out system. SOLUTION: A clock conversion section 21 generates a high speed clock CLK3 having a frequency twice or more higher than a low speed clock CLK2. A signal processing section 282 receives 10-bit pixel data D0 via a horizontal signal line 18, applies predetermined signal processing to the data, and transmits the result to a switching section 284 as data of a parallel form. The switching section 284 uses the high speed clock CLK3 from the clock conversion section 21 as a switching command to select one bit each out of the 10-bit data of the parallel form according to a predetermined order and output the one-bit data from an output terminal 284b, thus, converts the parallel data into serial data, and transmits the data to an output buffer 286. The output buffer 286 outputs data to the outside as differential outputs of non-inverted video data D1P and inverted video data D1N from output terminals 5cP and 5cN, respectively. COPYRIGHT: (C)2008,JPO&INPIT
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