发明名称 PROCESSOR INSTRUCTION SET
摘要 <p>The invention provides a processor comprising an execution unit and a thread scheduler configured to schedule a plurality of threads for execution by the execution unit in dependence on a respective status for each thread. The execution unit is configured to execute thread scheduling instructions which manage said statuses, the thread scheduling instructions including at least: a thread event enable instruction which sets a status to event-enabled to allow a thread to accept events, a wait instruction which sets the status to suspended pending at least one event upon which continued execution of the thread depends, and a thread event disable instruction which sets the status to event-disabled to stop the thread from accepting events. The continued execution comprises retrieval of a continuation point vector for the thread.</p>
申请公布号 WO2008110804(A1) 申请公布日期 2008.09.18
申请号 WO2008GB00878 申请日期 2008.03.13
申请人 XMOS LTD;MAY, DAVID 发明人 MAY, DAVID
分类号 G06F9/48;G06F9/38 主分类号 G06F9/48
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