发明名称 OFFSET CORRECTION CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide an offset correction circuit capable of shortening offset correction time without providing any additional capacitive elements. SOLUTION: The offset correction circuit includes: a first correction instruction signal generation circuit for generating a first correction instruction signal that changes in synchronism with the clock signal of a first frequency; a second correction instruction signal generation circuit for generating a second correction instruction signal that changes in synchronization with the clock signal of a second frequency higher than the first one; and an offset correction signal generation circuit that charges or discharges the capacitive element in response to a change in the first correction instruction signal in a normal mode so that an offset correction input voltage to a circuit to be corrected can be changed by a change in the amount of charge in the capacitive element, and charges or discharges the capacitive element in response to a change in at least the second correction instruction signal in a high-speed mode so that the offset correction input voltage to the circuit to be corrected can be changed by a change in the amount of charge of the capacitive element. COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008219295(A) 申请公布日期 2008.09.18
申请号 JP20070051966 申请日期 2007.03.01
申请人 FUJITSU LTD 发明人 KAKIUCHI TAKASHI
分类号 H03F3/34 主分类号 H03F3/34
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