| 摘要 |
A processing system features random access memory (RAM) and a processor. The processor features cache memory and multiple processing cores. The processor also features cache unmapping logic that can receive an unmap request calling for creation of a memory segment to be used as a shared memory segment to reside in the cache memory of the processor. The shared memory segment may facilitate interprocess communication (IPC). After receiving the unmap request, the cache unmapping logic may cause the processing system to omit the shared memory segment when writing data from the cache memory to the RAM. Other embodiments are described and claimed.
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