发明名称 TEST CIRCUIT, WAFER, MEASURING APPARATUS, MEASURING METHOD, DEVICE MANUFACTURING METHOD AND DISPLAY APPARATUS
摘要 There is provided a wafer on which a plurality of electronic devices and circuits under test are to be formed, where each circuit under test includes a plurality of transistors under measurement provided in electrically parallel, a selecting section which sequentially selects the respective transistors under measurement, and an output section which sequentially outputs the source voltages of the transistors under measurement sequentially selected by the selecting section.
申请公布号 US2008224725(A1) 申请公布日期 2008.09.18
申请号 US20070857444 申请日期 2007.09.19
申请人 NATIONAL UNIVERSITY CORPORATION TOHOKU UNIVERSITY 发明人 SUGAWA SHIGETOSHI;TERAMOTO AKINOBU
分类号 G01R31/26;H01L21/66 主分类号 G01R31/26
代理机构 代理人
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