发明名称 |
CAPACITOR TOP PLATE OVER SOURCE/DRAIN TO FORM A 1T MEMORY DEVICE |
摘要 |
A method and structure for a memory device, such as a 1T-SRAM, having a capacitor top plate directly over a doped bottom plate region. An example device comprises the following. An isolation film formed as to surround an active area on a substrate. A gate dielectric and gate electrode formed over a portion of the active area. A source element and a drain element in the substrate adjacent to the gate electrode. The drain element is comprised of a drain region and a bottom plate region. The drain region is between the bottom plate region and the gate structure. A capacitor dielectric and a capacitor top plate are over at least portions of the bottom plate region. |
申请公布号 |
US2008224228(A1) |
申请公布日期 |
2008.09.18 |
申请号 |
US20070686475 |
申请日期 |
2007.03.15 |
申请人 |
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发明人 |
TEO LEE WEE;LEE YONG MENG;LUN ZHAO;LAI CHUNG WOH;TAN SHYUE SENG;CHEE JEFFREY;MISHRA SHAILENDRA;WIDODO JOHNNY |
分类号 |
H01L29/76;H01L29/94;H01L31/00 |
主分类号 |
H01L29/76 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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