发明名称 SERIAL INTERFACE CIRCUIT
摘要 <P>PROBLEM TO BE SOLVED: To provide a serial interface circuit surely conducting an operation confirmation test, while keeping the circuit scale small. <P>SOLUTION: A test controller 13 outputs pseudo-random data to a PLL circuit 12 for transmission, which generates a clock including random jitters, and a serializer 11 converts parallel transmission data Transmit Data into serial transmission data SO, by using the clock, and inputs the serial transmission data to a clock data recovery circuit 22 via a serial loop-back circuit 30 and a multiplexer 24. The clock data recovery circuit 22 fetches the serial transmission data SO with one of the clocks from a PLL circuit 21 for reception and generates parallel data Recovered Data using a deserializer 23. <P>COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008219754(A) 申请公布日期 2008.09.18
申请号 JP20070057253 申请日期 2007.03.07
申请人 KAWASAKI MICROELECTRONICS KK 发明人 YOSHIYAMA MASAYUKI
分类号 H04L7/033;G06F13/00;H03L7/093 主分类号 H04L7/033
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