发明名称 PROGRAMMABLE HIGH-SPEED I/O INTERFACE
摘要 <P>PROBLEM TO BE SOLVED: To provide a method and an apparatus for providing flexible input and output in both high-speed and lower-speed. <P>SOLUTION: An input and output structure having a high-speed input, a high-speed output, a low or medium speed input, and an low or medium speed output is provided. One of the input and output circuits are selected and the others are deselected. A high-speed input and output circuit is comparatively simple, for example having only a clear signal for a control line input, and can interface to a low speed circuitry inside the core of an integrated circuit. The low or medium speed input and output circuit is more flexible, for example, having preset, enable, and clear as control line inputs, and can support JTAG boundary testing. These parallel high and lower speed circuits are user selectable, and accordingly the input output structure is optimized between speed and functionality depending on the requirements of the application. <P>COPYRIGHT: (C)2008,JPO&INPIT
申请公布号 JP2008217810(A) 申请公布日期 2008.09.18
申请号 JP20080096654 申请日期 2008.04.02
申请人 ALTERA CORP 发明人 WANG BONNIE I;SUNG CHIAKANG;HUANG JOSEPH;NGUYEN KHAI;PAN PHILIP
分类号 G06F3/00;G06F13/42;G06F13/38;H03K19/0175;H03K19/173;H03K19/177 主分类号 G06F3/00
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