| 摘要 |
PROBLEM TO BE SOLVED: To provide an electrostatic discharge protection circuit which has low leakage current during normal operation and low trigger voltage at the time when ESD stress is applied. SOLUTION: The semiconductor circuit has a VDD pad 4, an I/O pad 5, a VSS pad 6, a thyristor element 1, and a triggering PMOS transistor 2 for passing trigger current to the thyristor element 1. The thyristor element 1 has an anode connected with the I/O pad 5, a cathode connected with the VSS pad 6, and a gate connected with a source of the triggering PMOS transistor 2. The gate and a back gate of the triggering PMOS transistor 2 is connected with the VDD pad 4. COPYRIGHT: (C)2008,JPO&INPIT
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