| 摘要 |
<p><P>PROBLEM TO BE SOLVED: To shorten the access time of a multi-bit memory cell of a phase change memory that indicates a resistance states of two kinds or more. <P>SOLUTION: The multi-bit resistive memory includes a multi-bit resistive memory cell 112 and an inverted data indicator 114 that is a single-bit resistive memory cell for storing whether data stored in the multi-bit resistive memory cell is inverted. The multi-bit resistive memory cell includes a half of the low-resistance state and a half of high-resistance state, data are stored in the lower half resistive state, by inverting a data scheduled to be stored in the higher half resistance state. <P>COPYRIGHT: (C)2008,JPO&INPIT</p> |
