发明名称 Software-managed programmable associativity caching mechanism monitoring cache misses to selectively implement multiple associativity levels
摘要 A method of providing programmable associativity in a cache used by a processor of a computer system is disclosed. A congruence class of a memory block is defined using a first mapping function, providing a first associativity level of the cache. Program instructions in the processor select a second associativity level of a known appropriate level, and implement the second associativity level in the cache using a second mapping function. Application software may provide the program instructions, wherein the application software has procedures that may result in cache "strides" at particular associativity levels, and the known appropriate level is chosen to lessen memory latencies due to strides. Alternatively, the program instructions may be part of an operating system which monitors memory address requests, determines how efficient a procedure will operate at different associativity levels, and selects a most efficient level for the known appropriate level. The program instructions may select the associativity level by setting a value in a bit facility corresponding to the desired mapping function.
申请公布号 US6026470(A) 申请公布日期 2000.02.15
申请号 US19970839546 申请日期 1997.04.14
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 ARIMILLI, RAVI KUMAR;CLARK, LEO JAMES;DODSON, JOHN STEVEN;LEWIS, JERRY DON
分类号 G06F12/08;(IPC1-7):G06F13/00 主分类号 G06F12/08
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