发明名称 SIMD CALCULATION MODE CAPABLE OF DESIGNATING MULTIPLE REGISTERS
摘要 In view of a necessity of alleviating factors obstructing an effect of SIMD operation such as in-register data alignment in high speed formation of an SIMD processor, numerous data can be supplied to a data alignment operation pipe 211 by dividing a register file into four banks and enabling to designate a plurality of registers by a single piece of operand to thereby enable to make access to four registers simultaneously and data alignment operation can be carried out at high speed. Further, by defining new data pack instruction, data unpack instruction and data permutation instruction, data supplied in a large number can be aligned efficiently. Further, by the above-described characteristic, definition of multiply accumulate operation instruction maximizing parallelism of SIMD can be carried out.
申请公布号 KR100859044(B1) 申请公布日期 2008.09.17
申请号 KR20010050643 申请日期 2001.08.22
申请人 发明人
分类号 G06F7/38;G06F9/30;G06F9/302;G06F9/315;G06F9/34;G06F9/38;G06F15/80;G06F17/10 主分类号 G06F7/38
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