发明名称 Methods for manufacturing shallow trench isolation layers of semiconductor devices
摘要 A method for forming a shallow trench isolation layer that includes: forming a pad oxide on a substrate; forming a hard mask silicon nitride on the pad oxide; forming a moat pattern on the pad oxide and hard mask; etching partially the pad oxide and hard mask with the moat pattern to open the silicon nitride; and ashing process for removing the moat pattern.
申请公布号 US7425511(B2) 申请公布日期 2008.09.16
申请号 US20050194265 申请日期 2005.08.01
申请人 DONGBU ELECTRONICS CO., LTD. 发明人 JO BO YEOUN
分类号 H01L21/301 主分类号 H01L21/301
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