发明名称 Top layers of metal for high performance IC's
摘要 A method of closely interconnecting integrated circuits contained within a semiconductor wafer to electrical circuits surrounding the semiconductor wafer. Electrical interconnects are held to a minimum in length by making efficient use of polyimide or polymer as an inter-metal dielectric thus enabling the integration of very small integrated circuits within a larger circuit environment at a minimum cost in electrical circuit performance.
申请公布号 US7422976(B2) 申请公布日期 2008.09.09
申请号 US20050149092 申请日期 2005.06.09
申请人 LIN MOU-SHIUNG 发明人 LIN MOU-SHIUNG
分类号 H01L21/312;H01L21/02;H01L21/3205;H01L21/44;H01L21/4763;H01L21/50;H01L21/768;H01L23/52;H01L23/522;H01L23/525;H01L23/528;H01L23/532;H01L23/60;H01L27/06;H01L27/08 主分类号 H01L21/312
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