发明名称 |
In-situ deposition for cu hillock suppression |
摘要 |
A semiconductor interconnect structure having reduced hillock formation and a method for forming the same are provided. The semiconductor interconnect structure includes a conductor formed in a dielectric layer. The conductor includes at least three sub-layers, wherein the ratio of the impurity concentrations in neighboring sub-layers is preferably greater than about two.
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申请公布号 |
US7423347(B2) |
申请公布日期 |
2008.09.09 |
申请号 |
US20060334849 |
申请日期 |
2006.01.19 |
申请人 |
TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD. |
发明人 |
CHEN CHUNG-HSIEN;LIN CHUN-CHIEH;TSAI MINGHSING;SHUE SHAU-LIN |
分类号 |
H01L23/48;H01L23/52;H01L29/40 |
主分类号 |
H01L23/48 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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