发明名称 |
PLANAR MULTI SEMICONDUCTOR CHIP PACKAGE AND METHOD OF MANUFACTURING THE SAME |
摘要 |
Provided are a planar multi semiconductor chip package in which a processor and a memory device are connected to each other via a through electrode and a method of manufacturing the planar multi semiconductor chip package. The planar multi semiconductor chip package includes: a substrate comprising a plurality of first circuit patterns on a first surface and a plurality of second circuit patterns on a second surface; a first semiconductor chip comprising a plurality of memory devices arranged on the substrate, wherein first memory devices surround at least a portion of second memory devices; a second semiconductor chip stacked on the first semiconductor chip and corresponding to the second memory devices; and a plurality of through electrodes arranged on the second memory devices and connecting the first and second semiconductor chips to the second circuit pattern of the substrate.
|
申请公布号 |
US2008211081(A1) |
申请公布日期 |
2008.09.04 |
申请号 |
US20070951024 |
申请日期 |
2007.12.05 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
LEE JONG-JOO |
分类号 |
H01L23/48 |
主分类号 |
H01L23/48 |
代理机构 |
|
代理人 |
|
主权项 |
|
地址 |
|