发明名称 Integrated circuit for field bus systems, particularly inter integrated circuit system, has detection circuit, which is adjusted to differentiate two signal levels from each other and comparator circuit is adjusted to compare time intervals
摘要 <p>The integrated circuit has a detection circuit (5), which is adjusted to differentiate two signal levels from each other. A comparator circuit (6) is adjusted to compare the time intervals, in which the former signal level is laid at the individual data line (3), to another time interval in which the later signal level is lied at the individual data line. An allocation circuit (7) is arranged to release a value, if the former time interval is longer than the latter time interval and to release another value, if the former time interval is shorter than the latter time interval. An independent claim is also included for the method for transmission of digital data from one circuit to another circuit.</p>
申请公布号 DE102007008935(A1) 申请公布日期 2008.09.04
申请号 DE20071008935 申请日期 2007.02.23
申请人 AUSTRIAMICROSYSTEMS AG 发明人 TRATTLER, PETER
分类号 H04L25/40 主分类号 H04L25/40
代理机构 代理人
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