发明名称 MEMORY ELEMENT AND PROGRAM VERIFYING METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a memory element and a program verifying method in which a programming time can be decreased by decreasing a verifying time in program operation of a multi-level cell. <P>SOLUTION: The memory element including a multi-level cell is provided with a memory cell array in which many cell strings 211 connected respectively to respective bit lines and a common ground line are included and positive voltage is supplied to the common ground line during verification of the program, a page buffer for programming the multi-level cell through respective bit lines and reading out data to the memory cell, and a verification control part which makes the page buffer verify a program state of the memory cell by connecting the bit line and the page buffer in accordance with a voltage level pre-charged to the bit line when program verification of the memory cell or read-out operation of data is performed. <P>COPYRIGHT: (C)2008,JPO&INPIT</p>
申请公布号 JP2008204598(A) 申请公布日期 2008.09.04
申请号 JP20080005591 申请日期 2008.01.15
申请人 HYNIX SEMICONDUCTOR INC 发明人 WANG JONG HYUN;KIN TOKUCHU;PARK SEONG HUN;YANG CHANG WON
分类号 G11C16/02 主分类号 G11C16/02
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