发明名称 TECHNIQUE FOR PATTERNING DIFFERENTLY STRESSED LAYERS FORMED ABOVE TRANSISTORS BY ENHANCED ETCH CONTROL STRATEGIES
摘要 During the patterning of stressed layers having different types of intrinsic stress, the effects of the deposition of a silicon dioxide based etch indicator material between the first and second dielectric layers (230, 240) may be significantly reduced by a controlled etch (205) on the basis of optical measurement data (281) indicating the etch rate and, thus, the performance of the respective etch process (205). In other cases, highly efficient etch indicator species may be incorporated into the stressed dielectric layers (330, 340, 430, 440) or may be formed on a surface portion thereof with reduced layer thickness, thereby providing an enhanced endpoint detection signal without creating the negative effects of silicon dioxide based indicator layers. In one illustrative embodiment, a stressed silicon, nitrogen and carbon-containing layer (330) may be combined with a stressed silicon and nitrogen-containing layer (340), wherein the carbon species provides a prominent endpoint detection signal.
申请公布号 WO2008106207(A2) 申请公布日期 2008.09.04
申请号 WO2008US02663 申请日期 2008.02.28
申请人 ADVANCED MICRO DEVICES, INC.;SCHALLER, MATTHIAS;SALZ, HEIKE;RICHTER, RALF;MATTICK, SYLVIO 发明人 SCHALLER, MATTHIAS;SALZ, HEIKE;RICHTER, RALF;MATTICK, SYLVIO
分类号 H01L21/66 主分类号 H01L21/66
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