| 摘要 |
PROBLEM TO BE SOLVED: To provide a designing method of a semiconductor integrated circuit by which a size of a semiconductor chip is optimized, and design time is shortened, while power supply is made powerful, in layout designing. SOLUTION: The method is related to the layout designing of the semiconductor integrated circuit. First, cells are arranged on the semiconductor chip, after which the power supply is wired to the cells (S1, S2), and then a voltage drop generated on wiring of the power supply is measured, and an IR drop is analyzed based on its measured result (S3). Arrangement positions of the cells already arranged on the semiconductor chip are changed based on its analyzed result of the IR drop (S4, S5). After this is completed, signal wiring is performed between the cells on the semiconductor chip (S6). COPYRIGHT: (C)2008,JPO&INPIT
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