发明名称 NONVOLATILE SEMICONDUCTOR MEMORY
摘要 <p><P>PROBLEM TO BE SOLVED: To suppress false writing in a memory cell. <P>SOLUTION: The nonvolatile semiconductor memory according to an embodiment of the present invention includes a plurality of memory cells MC and MC"1" disposed in a P well area 21 within a semiconductor substrate 20 and serially connected with each other; selection gate transistors SGD and SGS connected to one-side ends and the other ends of the plurality of memory cells MC and MC"1"; a P well control circuit which controls the P well circuit 21; a plurality of word lines connected respectively to the plurality of memory cells; a row control circuit which controls the plurality of word lines; and an operation control circuit which performs control of the P well control circuit and the row control circuit. The operation control circuit controls, when writing is performed to a memory cell selected from the plurality of memory cells, the P well control circuit to supply precharge voltage Vread to the P well circuit 21 and precharge channels of the plurality of memory cells MC and MC"1". <P>COPYRIGHT: (C)2008,JPO&INPIT</p>
申请公布号 JP2008204545(A) 申请公布日期 2008.09.04
申请号 JP20070039758 申请日期 2007.02.20
申请人 TOSHIBA CORP 发明人 UENO HIROTAKA
分类号 G11C16/02;G11C16/04 主分类号 G11C16/02
代理机构 代理人
主权项
地址
您可能感兴趣的专利