发明名称 Method, apparatus, and program to efficiently calculate cache prefetching patterns for loops
摘要 A mechanism is provided that identifies instructions that access storage and may be candidates for cache prefetching. The mechanism augments these instructions so that any given instance of the instruction operates in one of four modes, namely normal, unexecuted, data gathering, and validation. In the normal mode, the instruction merely performs the function specified in the software runtime environment. An instruction in unexecuted mode, upon the next execution, is placed in data gathering mode. When an instruction in the data gathering mode is encountered, the mechanism of the present invention collects data to discover potential fixed storage access patterns. When an instruction is in validation mode, the mechanism of the present invention validates the presumed fixed storage access patterns.
申请公布号 US7421540(B2) 申请公布日期 2008.09.02
申请号 US20050120915 申请日期 2005.05.03
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 DONAWA CHRISTOPHER MICHAEL;KIELSTRA ALLAN HENRY
分类号 G06F12/00 主分类号 G06F12/00
代理机构 代理人
主权项
地址