发明名称 |
Circuit for reducing second order intermodulation |
摘要 |
A circuit for calibrating a second order intercept point (IP2) and for reducing second order intermodulation (IM2) includes a common mode feedback circuit and a load impedance operatively connected between first and second output terminals of a mixer in a direct conversion receiver. The common mode feedback circuit reduces second order intermodulation of the mixer by detecting an output voltage of the mixer and adjusting a gain of the mixer. The IP2 is controlled by controlling the gain of the common mode feedback circuit. The second order intermodulation (IM2) may be reduced and the linearity of a device may be enhanced.
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申请公布号 |
US7421263(B2) |
申请公布日期 |
2008.09.02 |
申请号 |
US20040013092 |
申请日期 |
2004.12.15 |
申请人 |
SAMSUNG ELECTRONICS CO., LTD. |
发明人 |
KIM WOONYUN |
分类号 |
H04B1/26;H04B1/10 |
主分类号 |
H04B1/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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