发明名称 Amplifier circuit of BTL system
摘要 An amplifier circuit of a BTL system is disclosed, which comprises a first operational amplifier which outputs an output signal having a same phase as an input signal input to a signal input terminal, a second operational amplifier which outputs an output signal having an opposite phase to the input signal, a voltage divider which generates a midpoint voltage of the input signal, a first resistor connected between an output terminal and a negative phase input terminal of the first operational amplifier, second and third resistors connected in series between the negative phase input terminals of the first and second operational amplifiers, a fourth resistor connected between an output terminal and the negative phase input terminal of the second operational amplifier, and an impedance converter connected between a midpoint voltage node of the voltage divider and a series-connection node of the second and third resistors.
申请公布号 US7420413(B2) 申请公布日期 2008.09.02
申请号 US20060498073 申请日期 2006.08.03
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 TSURUMI HIROYUKI
分类号 H03F3/45;H03F99/00 主分类号 H03F3/45
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