发明名称 CHARGE TRAP FLASH MEMORY DEVICE AND THE METHOD OF MANUFACTURING THE SAME
摘要 <p>A charge trap flash memory device and a manufacturing method thereof are provided to improve retention characteristics thereof by using a plurality of nano-dots having deep charge trap levels. A tunneling insulating layer(130) is formed on a semiconductor substrate. A charge trap layer(140) is formed on the tunneling insulating layer. A blocking insulating layer(150) is formed on the charge trap layer. A gate electrode is formed on the blocking insulating layer. The charge trap layer includes a plurality of trap layers(144,148), a plurality of nano-dots(142), and an intermediate blocking layer(146). The trap layers include a first material having band gap energy of a first level. The nano-dots are surrounded by one or more trap layers and include a second material having band gap energy of a second level lower than the first level. The intermediate blocking layer is formed between the trap layers and includes a third material having band gap energy of a third level higher than the first level.</p>
申请公布号 KR100855993(B1) 申请公布日期 2008.09.02
申请号 KR20070032939 申请日期 2007.04.03
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 ZONGLIANG HUO;YEO, IN SEOK;LIM, SEUNG HYUN;JOO, KYONG HEE;YANG, JUN KYU
分类号 H01L27/115 主分类号 H01L27/115
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