发明名称 FET bias circuit
摘要 The present invention discloses an FET (Field Effect Transistor) bias circuit comprising a current-changing information circuit having a power source, a resistor connected to the signal output end of this circuit, the other end of the resistor connected to a reference voltage source, and the node between the resistor and the current-changing information circuit acting as the output end providing voltage-changing information; and a voltage divider circuit connected to at least one voltage source, and connected to the output end providing the voltage-changing information; the current in a signal FET is controlled by providing the voltage-changing information at the output end to the voltage divider circuit, and getting a dividing voltage from the voltage divider circuit as an output end of the FET bias circuit. The bias circuit of the present invention causes the static drain current of the signal FET to remain constant, and reduces the variation of the static drain current of the signal FET of each chip made from an entire wafer. Its cost is low, its size is small, and it is easy to be integrated and fabricated.
申请公布号 US7420420(B2) 申请公布日期 2008.09.02
申请号 US20050568457 申请日期 2005.04.18
申请人 YAN YUEJUN 发明人 YAN YUEJUN
分类号 H03F3/04;H03F1/30;H03F3/16 主分类号 H03F3/04
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