MULTI-PATH ACCESSIBLE SEMICONDUCTOR MEMORY DEVICE HAVING PROCESSOR RESET FUNCTION AND METHOD FOR CONTROLLING RESET THEREFOR AND MULTI-PROCESSOR SYSTEM

摘要

A semiconductor memory device having processor reset function and a multi-processor system adopting the same and a method for controlling processor reset according thereto are provided to prevent boot time over of a slave processor during initial system booting. According to a semiconductor memory device adopted in a multi processor system, a shared memory region is accessed through a different port by processors in the multi processor system and is allocated to a part of a memory cell array. A reset signal generation part(402) provides a reset enable signal to a processor set as a slave processor during a constant time from initial system booting, and then provides a reset disable signal to the slave processor. The reset signal generation part comprises a mode register set circuit(A10) outputting a register setting signal in response to an external signal, a latch for latching the register setting signal applied through an input node, a switching transistor(NT2) for discharging the input node in response to a power up reset-related signal and a driver(PT1,NT1) outputting the reset enable signal or a reset disable signal by driving an output signal of the latch.