| 摘要 |
A memory arbiter for a data processing system having a unified memory and a memory arbitration method thereof are provided to arbitrate access to the unified memory stably in the data processing system such as an SoC(System on Chip) equipped with a plurality of MAUs(Memory Access Unit) by monitoring a memory access request of each MAU and using changed memory access latency of each MAU in real-time. A latency counter stores memory access latency of each MAU(210-250). An RMAL(Required Memory Access Latency) register(270) stores an RMAL of each MAU. An MALV(Memory Access Latency Value) register(290) stores an MALV subtracting the latency stored in the latency counter from the RMAL stored in the RMAL register by each MAU. An arbitration controller(201) arbitrates memory access by calculating/storing the latency and the MALV of each MAU to the latency counter and the MALV register, and selecting the MAU having the shortest MALV with comparison of the MALV of the MAUs when a memory access request is received from the MAUs. A standby time selection code register(280) stores codes which selects current standby time, period maximum standby time, permitted standby residual time by MAU.
|
