| 摘要 |
A performance apparatus (28) includes an accepting unit (90), a memory (94, 95), an output unit (93) and a performance unit (28b). The accepting unit (90) accepts first performance information from an outside of the performance apparatus, and the memory (94, 95) stores second performance information. The output unit (93) outputs one of a performance signal based on the first performance information accepted by the accepting unit (90) and a performance signal based on the second performance information stored in the memory (94, 95) on the basis of a predetermined performance condition. The performance unit (28b) executes a performance according to the performance signal output from the output unit (93). |
