发明名称 Adaptive gate voltage regulation
摘要 A memory device generates a select voltage and an unselect voltage on bit lines and generates a bit line select voltage having a magnitude less than the unselect voltage so that the application of the bit line select voltage to a gate of a transistor receiving the select voltage causes the transistor to conduct, and the application of the bit line select voltage to a gate of a transistor receiving the unselect voltage biases the transistor off.
申请公布号 US7417904(B2) 申请公布日期 2008.08.26
申请号 US20060554797 申请日期 2006.10.31
申请人 ATMEL CORPORATION 发明人 SIVERO STEFANO;SURICO STEFANO;CASER FABIO TASSAN;CHINOSI MAURO
分类号 G11C5/14 主分类号 G11C5/14
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