发明名称 Enhanced on-chip decoupling capacitors and method of making same
摘要 An apparatus including a capacitor formed between metallization layers on a circuit, the capacitor including a bottom electrode coupled to a metal layer and a top electrode coupled to a metal via wherein the capacitor has a corrugated sidewall profile. A method including forming an interlayer dielectric including alternating layers of dissimilar dielectric materials in a multilayer stack over a metal layer of a device structure; forming a via having a corrugated sidewall; and forming a decoupling capacitor stack in the via that conforms to the sidewall of the via.
申请公布号 US7416954(B2) 申请公布日期 2008.08.26
申请号 US20040766674 申请日期 2004.01.27
申请人 INTEL CORPORATION 发明人 BLOCK BRUCE A.;LIST RICHARD SCOTT
分类号 H01L21/00;H01L21/02;H01L27/08 主分类号 H01L21/00
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