发明名称 Digital clamping circuit and digital clamping method
摘要 A digital clamping circuit and a digital clamping method are provided which can effectively use the dynamic range of an output signal in black-level correction. When subtracting a black level serving as a reference value from an output signal of an analog front end circuit, a digital clamp circuit permits the production of a negative value, amplifies the dynamic range including the-negative value to increase the dynamic range, adds a predetermined value to the resulting signal, and performs clipping. As a result, the dynamic range of the digital clamp circuit is increased, so that the dynamic range of an output signal can be effectively utilized. Thus, processing that makes good use of a wider dynamic range can be performed in image processing at a subsequent stage, so that image quality can be improved.
申请公布号 US7417669(B2) 申请公布日期 2008.08.26
申请号 US20040769731 申请日期 2004.01.30
申请人 SEIKO EPSON CORPORATION 发明人 KURANE HARUHISA
分类号 H04N5/18;H04N5/228;H04N5/16;H04N5/243;H04N5/335;H04N5/361;H04N9/64 主分类号 H04N5/18
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