发明名称 Method for generating test patterns utilized in manufacturing semiconductor device
摘要 A method for generating test patterns utilized in manufacturing a semiconductor device includes creating mini-data concerning a partial area pattern used in designing the semiconductor device, subjecting the mini-data to data processing in accordance with a condition of a manufacturing process of the semiconductor device, thereby creating processed mini-data, extracting a marginless point in the processed mini-data where a process margin is less than a predetermined threshold in a manufacturing process of the semiconductor device, determining a class of the marginless point in accordance with a criticality and a category of the marginless point, determining a parameter and a range of the parameter used for the marginless point in accordance with the class of the marginless point, and generating a plurality of test patterns to which different values of the parameter are respectively applied within the range.
申请公布号 US7418694(B2) 申请公布日期 2008.08.26
申请号 US20060516783 申请日期 2006.09.07
申请人 KABUSHIKI KAISHA TOSHIBA 发明人 KOBAYASHI SACHIKO;IKEUCHI ATSUHIKO
分类号 G06F17/50;G03F1/36;G03F1/68;G03F1/70;G06F19/00;G21K5/00;H01L21/027 主分类号 G06F17/50
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