发明名称 |
Methods for fabricating a stress enhanced MOS circuit |
摘要 |
Methods are provided for fabricating a stress enhanced MOS circuit. One method comprises the steps of depositing a stressed material overlying a semiconductor substrate and patterning the stressed material to form a stressed dummy gate electrode overlying a channel region in the semiconductor substrate so that the stressed dummy gate induces a stress in the channel region. Regions of the semiconductor substrate adjacent the channel are processed to maintain the stress to the channel region and the stressed dummy gate electrode is replaced with a permanent gate electrode.
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申请公布号 |
US7416931(B2) |
申请公布日期 |
2008.08.26 |
申请号 |
US20060466383 |
申请日期 |
2006.08.22 |
申请人 |
ADVANCED MICRO DEVICES, INC. |
发明人 |
PEI GEN |
分类号 |
H01L21/336 |
主分类号 |
H01L21/336 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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