| 摘要 |
A repair signal generating circuit is provided to minimize a layout size of a semiconductor memory device by adjusting the number of fuses corresponding to the number of external addresses which are not required to be decoded. A repair signal generating circuit includes a repair control signal generator(1), a fuse signal generator(2), and a repair signal generator(3). The repair control signal generator generates a repair control signal, which indicates whether a defective cell exists. The fuse signal generator generates a fuse signal, which represents a word line having the different cell. The repair signal generator generates a repair signal according to an address decoding signal and a fuse signal in response to the repair control signal. The address decoding signal is generated by decoding an external address. The repair signal generator includes a fuse signal decoder(30), a signal level determining unit(32), and a repair signal delivering unit(34).
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