| 摘要 |
An apparatus for controlling a switch module in a memory is disclosed. The apparatus includes first and second pulse width adjusting units, a decoder, and a detector. The first pulse width adjusting unit receives an input instruction signal and selectively adjusts a pulse width of the input instruction signal to generate an adjusted input instruction signal according to a first pulse width adjustment. The decoder receives an input address signal and the adjusted input instruction signal to generate a control signal to control the switch module to access data. The second pulse width adjusting unit receives the control signal and selectively adjusts a pulse width of the control signal to control the switch module according to a second pulse width adjustment. The detector detects electrical characteristic of an input signal to control the first and second pulse width adjusting units to set the first and second pulse width adjustments.
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