发明名称 METHOD FOR MANUFACTURING MULTILAYERED WIRING SUBSTRATE
摘要 <p><P>PROBLEM TO BE SOLVED: To improve the shortening of a manufacturing period and yield factor, and prevent misregistration at the time of lamination while enabling a high density wiring. <P>SOLUTION: First, a wiring substrate 10 where a Cu post 17 is formed on a wiring layer 12 of one surface and a first stopper layer is formed at a desired position of the surroundings, a wiring substrate 20 that has a throughhole TH into which the Cu post 17 is inserted and where a connection terminal 27 is formed on a wiring layer 23 of one surface and a second stopper layer 26 that is engaged with the first stopper layer 16 functioning to suppress the misregistration in the planar direction, and a wiring substrate 30 where a connection terminal 36 is formed on a wiring layer 33 of one surface are each prepared in a separate process. Next, each wiring substrate 10, 20 and 30 is laminated to align each wiring layer so as to be mutually connected through the Cu post 17 and each connection terminal 27, 36, and a resin is filled between each substrate after each substrate is electrically connected. <P>COPYRIGHT: (C)2008,JPO&INPIT</p>
申请公布号 JP2008192999(A) 申请公布日期 2008.08.21
申请号 JP20070028521 申请日期 2007.02.07
申请人 SHINKO ELECTRIC IND CO LTD 发明人 MACHIDA KIYOHIRO
分类号 H05K3/46 主分类号 H05K3/46
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