发明名称 MEMORY ACCESS SYSTEMS FOR CONFIGURING WAYS AS CACHE OR DIRECTLY ADDRESSABLE MEMORY
摘要 A memory system is provided. A processor provides a data access address. A memory device includes a predetermined number of ways. The processor selectively configures a selected number less than or equal to the predetermined number of the ways as cache memory belonging to a cacheable region, and configures remaining ways as directly addressable memory belonging to a directly addressable region by memory configuration information. A memory controller determines the data access address corresponding to the cacheable region or the directly addressable region, selects only the way in the directly addressable region corresponding to the data access address when the data access address corresponds to the directly addressable region, and selects only the way(s) belonging to the cacheable region when the data access address corresponds to the cacheable region. A configuration controller monitors the status of the ways and adjusting the memory configuration information according to the status of the ways.
申请公布号 US2008201528(A1) 申请公布日期 2008.08.21
申请号 US20080107965 申请日期 2008.04.23
申请人 发明人 HSU TING-CHENG;LIN YEN-YU;PAN SHIEN-TAI
分类号 G06F12/00 主分类号 G06F12/00
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