发明名称 PROGRAMMABLE SRAM SOURCE BIAS SCHEME FOR USE WITH SWITCHABLE SRAM POWER SUPPLY SETS OF VOLTAGES
摘要 A memory circuit has a high voltage and low voltage supply nodes. One of a first and second sets of voltages is selectively applied to the supply nodes of the memory circuit in dependence upon memory operational mode. If in active read/write mode, then the first set of voltages is selectively applied. Conversely, if in standby no-read/no-write mode, then the second set of voltages is selectively applied. A low voltage in the second set of voltages is greater than a low voltage in the first set of voltages by a selected one of a plurality of low offset voltages, and a high voltage in the second set of voltages is less than a high voltage in the first set of voltages by a selected one of a plurality of high offset voltages. The offset voltages are provided by diode-based circuits that are selectively active. Selective activation is provided by either selectably blowable fuse elements or selectively activated switching elements.
申请公布号 US2008198678(A1) 申请公布日期 2008.08.21
申请号 US20080029366 申请日期 2008.02.11
申请人 STMICROELECTRONICS, INC. 发明人 MCCLURE DAVID C.;LYSINGER MARK A.;ZAMANIAN MEHDI;JACQUET FRANCOIS;ROCHE PHILIPPE
分类号 G11C5/14 主分类号 G11C5/14
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