SYSTEM AND METHOD FOR PERFORMING AN OPTIMIZED DISCRETE WALSH TRANSFORM

摘要

A circuit performs a discrete Walsh transform that comprises a first memory component, an adder, a subtracter, a second memory component, and a controller. In each of a plurality of stages, the controller enables the first memory component to communicate each of a plurality of pairs of values stored therein to the adder and to the subtracter. The controller enables the second memory component to store each of a plurality of results from the adder and the subtracter and to communicate the stored results to the first memory component for use in a subsequent stage. In the subsequent stage, the controller enables the first memory component to communicate to the adder and to the subtracter a plurality of new pairs of data values consisting first of the add results and then the subtract results from the previous stage in the order they were generated