| 摘要 |
A semiconductor memory device such as a flash memory with a memory cell array and a double-error correcting Reed-Solomon decoder, comprising: means for transforming the error location polynomial through variable transformation in order to obtain a unique coefficient depending on the syndromes; a lookup table for determining the error locations from the unique coefficient; and means for determining said unique coefficient from the syndromes through computation in a Residue Number System in order to achieve parallel processing and to reduce the quantity of computations, for example using residues through 15 and 17 when processing in GF (256)
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