发明名称 BUFFER CIRCUIT AND CONTROL METHOD THEREOF
摘要 The present disclosure has been worked out to provide a buffer circuit and a control method thereof capable of controlling the timing at which the output switching element is changed from an OFF state to an ON state, and preventing the output characteristic from becoming unstable. The buffer circuit includes: a driving portion 20 driving output switching elements M 1 and M 2; a detecting portion 30 detecting that the voltage values of control terminals of the output switching elements M 1 and M 2 have exceeded the threshold voltage value; an auxiliary driving portion 40 being connected to the driving portion 20 and changing driving capability of the output switching elements M 1 and M 2 in accordance with the result of detection by the detecting portion 30.
申请公布号 US2008197892(A1) 申请公布日期 2008.08.21
申请号 US20080029778 申请日期 2008.02.12
申请人 FUJITSU LIMITED 发明人 OSAWA HIROMITSU
分类号 H03K3/00 主分类号 H03K3/00
代理机构 代理人
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