Method of operating cyclic redundancy check in memory system and memory controller using the same

摘要

A method of performing a cyclic redundancy check (CRC) operation in a memory system, and a memory controller that uses the same. The method includes initializing a linear feed-back shift register (LFSR) circuit in a CRC polynomial, generating CRC parity information with respect to input data to be stored in a memory device by using the LFSR circuit, and generating a CRC code with respect to the input data based on the CRC parity information, such that the initialization of the LFSR circuit is set such that a register initial value of the LFSR circuit is determined to satisfy a condition that, when data input to the LFSR circuit is first state information, the CRC parity information generated from the LFSR circuit is second state information.

主权项

1. A method of operating a cyclic redundancy check (CRC) operation in a memory system, the method comprising:
selecting a reference state defined by a predetermined reference pattern of bit values; initializing, by a memory controller, a linear feed-back shift register (LFSR) circuit that corresponds to a CRC polynomial; generating CRC parity information with respect to input data to be stored in a memory device by using the LFSR circuit; and generating a CRC code with respect to the input data based on the CRC parity information, wherein the initialization of the LFSR circuit by the memory controller is set such that a register initial value of the LFSR circuit is determined to satisfy a condition that, when data input to the LFSR circuit is first state information having the predetermined reference pattern of bit values, the CRC parity information generated from the LFSR circuit is second state information defined by second bit values based on the CRC polynomial.