发明名称 Address translation in partitioned systems
摘要 Embodiments of apparatuses, methods, and systems for guest to host address translations for devices to access memory in a partitioned system are disclosed. In one embodiment, an apparatus includes an interface, partitioning logic, first address translation logic, and second address translation logic. The interface is to receive a request from a device to access memory in a partitioned system. The partitioning logic is to determine whether the device is assigned to a first partition or a second partition. The first address translation logic is to translate a first guest address to a first host address in the first partition. The second address translation logic is to translate a second guest address to a second host address in the second partition.
申请公布号 EP1959348(A2) 申请公布日期 2008.08.20
申请号 EP20070254934 申请日期 2007.12.19
申请人 INTEL CORPORATION 发明人 SUGUMAR, SURESH;PANESAR, KIRAN S.;IYER, NAREYAN N.
分类号 G06F12/10;G06F9/455 主分类号 G06F12/10
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