摘要 |
<p>A non-volatile memory transistor having a polysilicon fin, a stacked non-volatile memory device having the transistors, a method of manufacturing the transistor, and a method of manufacturing the memory device are provided to reduce a leakage current and increase an on-current and a program/erasure window by forming a pillar type polysilicon fin in the non-volatile memory transistor. A non-volatile memory device includes an active fin(100a), a first charge storage pattern(117'), a first control gate line(119c), an interlayer dielectric(120), a polysilicon fin(135a), a second charge storage pattern(137'), and a second control gate line(139c). The active fin is protruded upwards from a semiconductor substrate. The first charge storage pattern covers an upper surface and a sidewall of the active fin. The first control gate line covers the upper surface of the first charge storage pattern and traverses an upper surface of the active fin. The interlayer dielectric is arranged on the first control gate line. The polysilicon fin is arranged on the interlayer dielectric. The second charge storage pattern covers the upper surface and the sidewall of the polysilicon fin. The second control gate line covers the upper surface of the second charge storage pattern and traverses the upper portion of the polysilicon fin.</p> |